Technical Staff Engineer - Design

Location Malaysia
Discipline Engineering
Job reference 165645
Salary 12000.0
Consultant name Joseph Barik
Contact email [email protected]
Contact name Joseph Barik
Contact email [email protected]

Technical Staff Engineer - Design
Salary: RM12,000

Job Description:

  • To lead technically in ASIC physical design domain, which may include stages from design specification understanding till layout and timing signoff for tapeout
  • To develop and signoff I.C. design projects physical design and flow improvement.


Responsibilities include (as applicable)

  • Effective and efficient auto Place-and-Route implementation, covering floorplanning, PG mesh, placement, CTS, routing and chip-finishing
  • Identify and derive special handling from design spec, such as NDR, source-sync and latency/skew control
  • DRC/LVS and RV debug and convergence, including analysis for waiver request
  • Low power design; vector-driven layout optimization and leakage/dynamic power control techniques
  • Provide technical guidance and review for team members in solving complex challenges, with high problem-solving skill and critical thinking capability
  • Creating technical intellectual property such as patents and trade secrets
  • Drive for Best-in-Class design implementation approach/process or new design methodologies benchmarking


To document I.C. Design layout and work procedures

  • Capturing physical design layout approach, consideration, challenges and solutions employed using corporate template documentation
  • Complete audit and checklist fill-in, review and closure in compliance to corporate Design Control Procedures (DCP)
  • Filing issues, solution details and review confirmation in project ticketing system (PEPS) or CAD ticketing system (JIRA)

To interface with

  • Project manager, product-development, IG and ATPG team on project related issues
  • CAD/TA on flow methodology

Requirements/Qualifications:

  • Bachelor’s/Master’s Degree in Electrical/Electronics Engineering, with 12+ years of ASIC I.C. Design working experience
  • Cadence Innovus or Synopsys ICC/ICC2 expertise
  • Cadence Voltus or Apache Redhawk expertise

Added advantage

  • Exposure to 7nm and below advanced process nodes
  • Familiar with PDK and advanced layout design rules and requirement
  • Strong scripting skills in Perl, TCL, Shell or Python

Apply on website or send your resume to Joseph: [email protected]